1. Field of the Invention
The present invention relates to a coil on a semiconductor substrate, in particular to a high-quality coil, and to a method of producing same.
2. Description of the Related Art
Many integrated semiconductor packages and/or semiconductor chips contain coils. When producing a semiconductor package, a device layer having a plurality of diodes, transistors or other semiconductor devices is created on the surface of a silicon substrate. Several layers of wiring which contain metallic wiring conductor tracks for wiring the devices and in addition may contain capacitors, coils etc., are created above the device layer. Electrically insulating intermetal dielectric layers for electrically insulating the wiring conductive tracks, or wiring traces, are arranged between the layers of wiring. Coils are produced, in or on the layers of wiring, in the form of spiral-shaped traces that may comprise several spiral turns and various geometries, the ends of the coil being contacted electrically as the input and the output. The material of the coil trace may comprise aluminum, aluminum alloys, copper or other conductive materials, in particular metals, just like the material of the wiring traces.
In particular in high-frequency applications, quality is one of the most important parameters of a coil and should be as high as possible. The quality of the coil is determined by any power losses, i.e. among other things, by the electrical resistance of the coil trace, so that the quality of the coil may be influenced by the choice of material of the coil trace and/or of the conductive layer forming the coil. In addition, the quality of a coil is influenced to a significant degree by a coupling of the coil to surrounding matter. To produce high-quality, high-frequency coils, efforts have generally been made to reduce these losses caused by coupling to the substrate.
One possibility of improving the quality of a coil is to reduce, or minimize, the losses by the correct choice of dopant of the silicon substrate when using a silicon substrate. However, in many cases the dopant of the silicon substrate cannot be chosen freely since it typically is linked, at the same time, to other properties of the silicon substrate, for example to its suitability for certain devices or arrangements of devices.
A further possibility of improving the quality of a coil is to incorporate a shield between the coil and the substrate. However, this typically involves a fair amount of work and considerable extra cost in production, and is therefore unsuitable for many applications.
In addition, both the choice of the dopant of the silicon substrate and incorporation of a shield may achieve only a slight improvement in the quality of the coil.
A further possibility is to remove the silicon substrate underneath the coil. However, this also requires labor-intensive and cost-intensive additional steps in the manufacturing process.
US 2001/0016409 A1 describes an inductive element with high quality Q. The inductive element is comprised of conductors arranged above a cavity formed in insulating layers, and held by support structures. The cavity is filled with parylene C, polyimide, a foam, or air. The support structures arise from the insulating layers when forming the cavity by etching.
EP 1039544 A1 describes a monolithically integrated circuit with an inductor. The inductor has copper turns disposed on a silicon oxide layer. Between the silicon oxide layer and an opposing passivation layer, a cavity is disposed. A gold layer is provided on the turns.
US 2002/0008301 A1 describes a monolithical inductance device with high quality Q. In an area below a coil formed of a stack of parallel spiral-shaped conductive lines, a first insulating layer is replaced by a second insulating layer with a lower dielectric constant.
U.S. Pat. No. 6,140,197 A describes a spiral-shaped high-frequency inductor with high quality Q. At first, openings, which are the closed by a thin oxide layer, are created in an inter-metal dielectric layer. The inductor is created on the thin oxide layer.
U.S. Pat. No. 6,180,995 B1 describes an integrated passive device with reduced parasitic capacity to the substrate. A metal spiral-shaped inductor or a capacitor is disposed over an air gap in an epitactic layer. Over the epitactic layer, at first a field oxide layer is formed and provided with a plurality of openings. By means of an isotropically acting etching medium, the air gap is created below the openings in the field oxide layer. By conformly depositing an oxide, the openings in the field oxide layer are closed before the inductive spiral is formed. Alternatively, metal lines are formed in the field oxide layer before openings and an air gap are created.
US 2001/0028098 A1 describes an inductor with high quality Q. After the forming of a coil from spiral-shaped metal lines, spiral-shaped trenches are created therebetween.
U.S. Pat. No. 6,287,931 B1 describes a method of producing an on-chip inductor. In a semiconductor substrate, a trench is formed and filled with an insulating layer having lower relative permittivity than silicon oxide. Over the trench or the insulating layer filling it, a spiral-shaped conductive coil is formed.